1. Technical Field
The disclosed embodiments relate to differential amplifiers, and more particularly to high performance differential amplifiers that can be coupled to low impedance sources without intervening matching networks.
2. Background Information
The first stage in a receiver is often an amplifier referred to as a Low-Noise Amplifier or “LNA”. FIG. 1 (Prior Art) is a simplified block diagram of a device that employs such an LNA. The device is a mobile communication device (for example, a cellular telephone handset) and includes an antenna 1, an analog Radio Frequency (RF) transceiver integrated circuit 2, a digital baseband processor integrated circuit 3, a duplexer 4, a power amplifier 5, and a number of matching networks 6-9. A processor 10 in the digital baseband processor integrated circuit 3 controls the RF transceiver 2 by sending control communications to a receive chain 11 and to a transmit chain 12 of the RF transceiver integrated circuit 2 via a serial bus 13. The first stage of the receive chain 11 is the LNA 14.
FIG. 2 (Prior Art) is a more detailed diagram of the portion of the circuit of FIG. 1 between antenna 1 and LNA 14. The LNA in this example is a differential LNA. LNA 14 receives a differential signal via terminals 15 and 16. Dashed line 17 represents the boundary of integrated circuit 2. LNA 14 outputs a differential signal to a differential quadrature mixer circuit 18. The receiver is tuned by setting the frequency of a local oscillator signal LO1 output by a local oscillator 19. The signal input path to the terminals 15 and 16 includes antenna 1, matching network 6, duplexer 4, a bandpass filter (BPF) 20, a balun 21, and matching network 7. Providing the additional components of matching network 7 generally adds cost to the manufacturing cost of the overall device. It would be desirable not to have to provide such a matching network, but it is unfortunately often necessary. It is difficult to realize an LNA that has low noise (noise factor <2 dB), high gain (>20 dB), and an input impedance of fifty ohms. The input impedance at operational frequencies looking into the conventional LNA 14 of FIG. 2 is substantially higher than fifty ohms and may be one hundred ohms or more. The impedance of antenna 1, on the other hand, is approximately fifty ohms.
FIGS. 3-6 (Prior Art) are diagrams of several conventional types of LNAs. Although single-ended examples of the topologies are presented for ease of illustration and explanation, the topologies are extendable to differential circuits.
FIG. 3 (Prior Art) is a diagram of an LNA having a resistive feedback amplifier based input stage and a source follower based output stage. Transistors M1a and M1b and resistor R form the input stage. Transistors M2a and M2b and M3 form the output stage. IN denotes the input node. OUT denotes the output node. For additional information on this LNA circuit, see: F. Bruccoleri et al, “Wide-Band CMOS Low-Noise Amplifier Exploiting Thermal Noise Canceling,” IEEE Journal of Solid-State Circuits, vol. 39, No. 2, pages 275-282, February 2004. This LNA circuit has an advantage that noise and distortion products of the input stage including the noise of resistor R are substantially canceled. The noise on nodes X and Y is, however, in phase. To achieve voltage-mode noise cancellation of this noise, a source follower output stage is employed. The source of transistor M3 is coupled to the output node OUT. The output impedance of the LNA is low and gain is limited.
FIG. 4 (Prior Art) is a diagram of another conventional single-ended LNA that includes a resistive feedback input stage and a source follower output stage. Circuit components 22, 23 and 24 form the resistive feedback input stage. Circuit components 25, 26 and 27 form a source follower output stage. In this case, as in the case of the circuit of FIG. 3, noise of the feedback resistor 23 is substantially canceled. The source follower output stage provides rather limited gain.
FIG. 5 (Prior Art) is a diagram of an LNA having a common-gate input stage and two common source output stages. Transistor M1 and resistor R1 form the input stage. Transistors M3 and M5 and resistor RL form the first output stage. Transistors M4 and M5 and resistor RL form the second output stage. This circuit has the advantage of relatively high gain and has the advantage that noise and distortion products of transistor M1 of the input stage are canceled. A disadvantage, however, is that noise from resistor R1 is not canceled. Moreover, the resistance of R1 is limited by available voltage headroom. There is a need for a current source at the input of the common gate input amplifier, but the noise of this current source is not canceled. Moreover, a single-ended implementation of the circuit of FIG. 5 is difficult due to the current source at the input. For additional information on this LNA circuit, see: C. Liao et al., “A Broadband Noise-Canceling CMOS LNA for 3.1-10.6-GHz UWB Receivers,” IEEE Journal of Solid-State Circuits, vol. 42, No. 2, pages 329-339, February 2007.
FIG. 6 (Prior Art) is a diagram of yet another conventional LNA. This LNA includes a common-gate input stage as in the case of the LNA of FIG. 5. The input stage involves circuit components 28, 29 and 30. Noise of load resistor 30 is not canceled. The LNA of FIG. 6, however, includes a complementary output stage and has an advantage of high gain. The term complementary is used to indicate that the output stage includes a P-channel transistor 31 as well as an N-channel transistor 32.
Although the conventional LNAs of FIGS. 3-6 have advantages and disadvantages as set forth above, none of these LNAs has a low noise factor of less than 2 dB, a high gain of greater than 20 dB, and an input impedance as low as approximately fifty ohms. Consequently, after considering advantages and disadvantages associated with the various known LNA circuits, a design decision is generally made to employ an undesirable and costly matching network such as the matching network 7 of FIG. 1 and FIG. 2 in order to achieve desired LNA performance.